Example sentences of "[art] next instruction to be " in BNC.
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1 | The control unit contains a special storage device or register , the program counter , which contains the address of the store location holding the next instruction to be executed or obeyed . |
2 | The fetch phase involves extracting the contents of the store location referred to by the program counter , and decoding it into an operation code portion , specifying an operation to be carried out , and an operand portion , specifying a store address ( whose numeric value we will indicate as The program counter is then incremented by one , to point to the next store location in sequence , since this normally holds the next instruction to be executed . |
3 | ( c ) The sequence of instructions being executed is to be changed , so that the next instruction to be executed is not the one stored immediately after the instruction currently being executed . |
4 | We require two types of jump instruction ; one ( the unconditional jump ) which always changes the program counter , and one ( the conditional jump ) which changes the program counter only if a certain condition is true ( such as that the accumulator contains a non-negative value ) ; if the condition is false , the next instruction to be executed is the one stored immediately after the jump instruction . |
5 | As on the Von Neumann computer , the Intel 8080 has an ( 8-bit ) accumulator , on which most arithmetic operations take place , and a ( 16-bit ) program counter , to hold the address of the next instruction to be executed . |
6 | Normally the program counter holds the store address of the next instruction to be executed , and is incremented appropriately as each instruction is executed . |
7 | We therefore require a set of conditional jump or conditional branch instructions , which transfer control to the instruction at the specified store address only if a certain condition is met ; if the condition is not met , the next instruction to be executed is that immediately following the jump instruction . |
8 | The sequence bits of a micro-instruction hold the address of the next instruction to be executed , and this field is gated into the SAR of the control store at the beginning of the next micro-instruction cycle . |